\title{ECE 472 Homework 1}
\author{Drake Vidkjer}
\date{\today}

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\section{Write a C program that returns the following information about your CPU, using the CPUID assembly instruction}


\paragraph{Answer}
While not all of the program functions work properly, as far as I can tell they are correct
and follow the documentation provided by the Intel Software Developers Manual. I have done all
that I can to get the functions to work properly, and debug what was wrong but I cannot tell.
As far as things such as printing the processor name and such goes, I dont know where this
information would be located. I have done what I can in the lookup.h file, but for things such
as the TLB and cache info, the hex values that return and the table entry that correspind have
no real order, for example the hex values do not of 123...9AB they sometimes go 123..9CD or 12D
so there is now way to make a nice table without taking a massive amount of time to hard code in

\section{Describe the difference between architecture and organization.}

\paragraph{Answer}
Architecture is the programmer's view of the computer system. it is an abstracted model of
the interface between hardware and software. It is very high level and describes what the 
computer does without being messy or detailed. Organization is the low level description of
the components and connections between the components. It deals with low level descriptions
of how a computer does a task. An example is for Archtecture, one might ask if the computer
has floating point instructions, while from an organization perspective one might ask if the 
computer has an integrated floating point unit.

\section{Describe the concept of endianness. What common platforms use what endianness?}

\paragraph{Answer}
Endianess refers to the ordering of bits in digital systems. In its basic sense, endianess
refers to which side of a binary string is most significant. In big-endian, binary values
are ordered from the most significant bit, while in little endian they are ordered from the
least significant. Architectures such as the motorolla 68000, IBM z/Architecture, and the 
TCP/IP internet protocol use big- endian while x86 uses little endian. ARM has the capability
of using both methods, even at the same time and in the same program.

\section{Give the IEEE 754 floating point format for both single and double precision.}

\paragraph{Answer}
\verb|x = (-1)^s * ( 1 + Fraction) * 2 ^ (Exponent - Bias)|\\
\verb|S = sign bit (0 = +, 1 = -);	Single precision Bias = 127|\\	\verb|Double precision Bias = 1203|\\
\verb|Exponents 000..00000 & 111..11111 are reserved.|\\

\begin{tabular}{ l | c | r | w}
    \hline
    S & Exponent & Fraction & Precision \\ \hline
    1 & 8 bits & 23 bits & Single Precision \\ \hline
    1 & 11 bits & 52 bits & Double Precision \\
    \hline
\end{tabular}
					 
\section{Describe the concept of the memory hierarchy. What levels of the hierarchy are present on flip.engr.oregonstate.edu?}

\paragraph{Answer}
Memory hierarchy refers to the different layers of memory and storage that are available to the
processor. It starts with registers, then the L1 cache that is specific to a single processor core, and 
as the level of cache goes up, it is shared by more cores, and is slower as it goes up from Ln Cache, to 
main memory, to general storage.  Using the lscpu command, I was able to find that the flip1 server I was on had 64K of L1 cache, 256K of L2, and 12288K of L3 cache.

\section{What streaming SIMD instruction levels are present on flip.engr.oregonstate.edu?}

\paragraph{Answer}
The flip1 server has MMX, SSE, SSE2, SSE3 and SSE4.x and FXSR.


\begin{thebibliography}{1}

  \bibitem{boise} http://cs.boisestate.edu/~alark/cs354/lectures/ieee754.pdf

  \bibitem{umd}  https://www.cs.umd.edu/class/sum2003/cmsc311/Notes/Data/endian.html

  \bibitem{wiki1} https://en.wikipedia.org/wiki/Endianness

  \bibitem{wiki2} https://en.wikipedia.org/wiki/CPUID#Calling_CPUID

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This is never printed